Timer & Prescaler Calculator — PSC and ARR values
Every valid prescaler and reload pair for a target frequency on AVR, STM32, PIC and RP2040 — ranked by error, with C you can paste.
Example: 1 kHz from a 16 MHz clock needs prescaler ÷1 and OCR1A = 15999, giving 1 kHz (0% error).
Check it against real silicon
Chiprun runs your firmware on an emulated microcontroller and hands back the UART output, so you can confirm these numbers rather than trusting them.
Formula
f_timer = f_clk / (prescaler × count)Worked example
1 kHz from a 16 MHz clock needs prescaler ÷1 and OCR1A = 15999, giving 1 kHz (0% error).
total division = f_clk / f_target
16 MHz / 1 kHz
16000
count = division / prescaler
count = 16000 / 1
count = 16000
Registers hold count − 1, because the counter includes zero — hence OCR1A = 15999.
actual = f_clk / (prescaler × count)
actual = 16 MHz / (1 × 16000)
actual = 1000 Hz
Frequently asked questions
How do I get a 1 kHz timer interrupt on a 16 MHz AVR?
You need to divide by 16,000. With a ÷64 prescaler the count is 250, so OCR1A = 249 in CTC mode. That is exact — no error at all, which is why 16 MHz and 1 kHz is such a common pairing.
Why is the register one less than the count?
The counter includes zero, so counting 0 through 249 is 250 ticks. Writing 250 instead would give 251 ticks and a slightly slow timer. This is the most common off-by-one in timer setup.
Which prescaler should I choose when several work?
The smallest one that keeps the count inside the counter's range. A smaller prescaler means a larger count, which means finer resolution if you later adjust the period — and less jitter relative to the target.
Why can AVR only use certain prescalers?
The prescaler is a fixed chain of divide-by-two stages with taps at 1, 8, 64, 256 and 1024, selected by three bits. STM32 instead uses a full 16-bit prescaler register, so any division from 1 to 65536 is available — which is why it can usually hit a target exactly.
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