Watchdog Timeout Calculator — prescaler and reload values
Prescaler and reload values for a target watchdog period, with the achievable timeout range.
Example: A 1 s watchdog needs prescaler ÷8 with reload 3999, giving 1 s nominal — but 500 ms to 2 s once clock tolerance is included.
Check it against real silicon
Chiprun runs your firmware on an emulated microcontroller and hands back the UART output, so you can confirm these numbers rather than trusting them.
Formula
timeout = prescaler × (reload + 1) / f_watchdogWorked example
A 1 s watchdog needs prescaler ÷8 with reload 3999, giving 1 s nominal — but 500 ms to 2 s once clock tolerance is included.
timeout = prescaler × (reload + 1) / f_watchdog
8 × 4000 / 32 kHz
1 s
worst case = timeout × (1 ± clock tolerance)
1 s with ±50%
500 ms … 2 s
Design the feed interval against the fast end, not the nominal.
Frequently asked questions
How do I calculate a watchdog timeout?
timeout = prescaler × (reload + 1) / watchdog clock. On an STM32 IWDG with the 32 kHz LSI, a ÷32 prescaler and a reload of 999 gives 1 second. This tool searches every prescaler for the closest match.
Why is my watchdog timeout not what I calculated?
The clock. An independent watchdog runs from an internal RC oscillator, not a crystal, and the STM32 LSI is specified only to roughly ±50% across temperature and part spread. Always design the feed interval against the fast end of that range.
How often should I feed the watchdog?
About twice as often as the shortest possible timeout, so there is margin if the clock runs fast. Critically, feed it from your main loop — feeding it from a timer interrupt means it keeps being fed even after the main loop has hung, which defeats the entire purpose.
Why does my debugger cause watchdog resets?
Because the independent watchdog keeps counting while the core is halted at a breakpoint. Most parts have debug freeze bits — DBGMCU_APB1_FZ on STM32 — that stop it during a debug halt. Set them, or you will be reset every time you stop to inspect something.
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