Logic Level Reference — will these two parts talk?

Input and output thresholds for TTL, CMOS, LVCMOS and LVDS, and which families you can safely interconnect.

Example: LVCMOS 3.3 V driving CMOS 5 V (74HC, 4000 series): will not work reliably. High margin -1.1 V, low margin 1.1 V.

Inputs

Driving output

Receiving input

Result

Verdict

Will not work reliably

High noise margin: -1.1 V
Low noise margin: +1.1 V
Driver V_OH min: 2.4 V
Receiver V_IH min: 3.5 V
Driver V_OL max: 400 mV
Receiver V_IL max: 1.5 V

Logic high fails: the driver only guarantees 2.4 V, but the receiver needs 3.5 V to read a 1. The signal may appear to work on the bench and fail across temperature or part-to-part variation.
The standard fix is a 74HCT-series buffer: CMOS outputs with TTL input thresholds, so it reads 3.3 V logic and drives full 5 V swings.

Logic family thresholds

Family	Vcc	V_OH min	V_OL max	V_IH min	V_IL max	Abs max
TTL / 74LS (5 V)	5 V	2.7 V	0.5 V	2 V	0.8 V	5.5 V
CMOS 5 V (74HC, 4000 series)	5 V	4.4 V	0.33 V	3.5 V	1.5 V	5.5 V
74HCT (5 V, TTL-compatible inputs)	5 V	4.4 V	0.33 V	2 V	0.8 V	5.5 V
LVTTL 3.3 V	3.3 V	2.4 V	0.4 V	2 V	0.8 V	3.6 V
LVCMOS 3.3 V	3.3 V	2.4 V	0.4 V	2 V	0.8 V	3.6 V
LVCMOS 2.5 V	2.5 V	2 V	0.4 V	1.7 V	0.7 V	2.75 V
LVCMOS 1.8 V	1.8 V	1.35 V	0.45 V	1.17 V	0.63 V	2 V

Formula

high margin = V_OH(driver) − V_IH(receiver)    low margin = V_IL(receiver) − V_OL(driver)

Worked example

LVCMOS 3.3 V driving CMOS 5 V (74HC, 4000 series): will not work reliably. High margin -1.1 V, low margin 1.1 V.

high margin = V_OH(driver) − V_IH(receiver)
2.4 V − 3.5 V
-1.1 V
Negative — a logic 1 may not be recognised.
low margin = V_IL(receiver) − V_OL(driver)
1.5 V − 400 mV
1.1 V
Positive, so a logic 0 is read correctly.

Frequently asked questions

Can I connect a 3.3 V output to a 5 V input?

Only if the 5 V input has TTL thresholds. A 5 V CMOS input needs 3.5 V to register a high, and a 3.3 V part cannot supply that. A 74HCT buffer solves it — CMOS outputs with TTL inputs — as does any 5 V part with TTL-level inputs.

Can I connect a 5 V output to a 3.3 V input?

The levels are readable, but usually not safely. Most 3.3 V inputs have an absolute maximum around 3.6 V, and 5 V will eventually damage the pin. Use a level shifter, a divider for slow signals, or check the datasheet for explicit 5 V tolerance on that specific pin.

What is a noise margin?

How much the signal can be disturbed before it is misread. It is the gap between what the driver guarantees and what the receiver requires. A small positive margin technically works but leaves nothing for supply droop, ground offset or crosstalk.

Why does my level translation work on the bench and fail in production?

Because bench parts are typical and the datasheet numbers are worst case. A marginal combination often works with the specific chips in front of you, then fails on parts from a different lot or at temperature extremes. Design to the guaranteed limits, not what you measure.

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